A Framework for Assessing the Feasibility of Learning Algorithms in Power-Constrained ASICs

Whether due to injury or neurodegenerative disease, millions of paraplegics suffer from an inability to actuate their limbs despite functional thought processes. Neuroscientists have developed methods [1] of monitoring and interpreting neural activity. By surgically implanting an electrode array in the motor cortex of the brain, scientists can tap into the real-time neural activity of an individual. These neural observations can be interpreted as an intended actuation which can then be realized on behalf of the individual. A paraplegic, once lacking the agency to perform simple physical tasks, can now do so by thought alone; a revolutionary improvement in quality of life. Current neural decoding implementations render the patient tethered to a cart of computers with visible wires emerging from his or her head. Collection of neural activity occurs beneath the skullcap while processing is done remotely. There is much room for improvement on this setup; patients are embarrassed by the physical appearance of the apparatus and can only utilize it in the controlled environment of a university laboratory.